VAST lab at UCLA

The VAST lab at UCLA investigates cutting-edge research topics at the intersection of VLSI technologies, design automation,  architecture and compiler optimization at multiple scales, from micro-architecture building blocks,  to heterogeneous compute nodes, and scalable data centers.  Current focuses include architecture and design automation for emerging technologies, customizable domain-specific computing with applications to multiple domains, such as imaging processing, bioinformatics, data mining and machine learning.

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Latest News

Tue, Jan 24, 2023

The VAST lab is pleased to be part of the Center for Processing with Intelligent Storage and Memory (PRISM) under the JUMP 2.0 program led by UC San Diego in collaboration from Professors ...

Tue, Jan 24, 2023

Congratulations to Prof. Jason Cong and his former PhD students Guojie Luo and Bingjun Xiao and former postdoc Kelly Tsota for receiving the 10-Year Retrospective Most Influential Paper Award from the 28th Asia and South Pacific Design Automation Conference (ASP-DAC'2023) for their work "...

Mon, Nov 28, 2022

Sung Kyu Lim
for contributions to electronic design automation and tradeoff for 3-dimensional integrated circuits

Zhiru Zhang
for contributions to field-programmable gate array high-level synthesis and accelerator design

Each year, following a rigorous evaluation...

Latest Publications

A hardware system for real time decoding of in vivo calcium imaging data
Journal publication
Zhe Chen, Garrett J Blair, Changliang Guo, Jim Zhou, Juan-Luis Romero-Sosa, Alicia Izquierdo, Peyman Golshani, Jason Cong, Daniel Aharoni, Hugh T Blair
[PDF]: CHARM: Composing Heterogeneous Accelerators for Matrix Multiply on Versal ACAP Architecture
Conference publication
Jinming Zhuang, Jason Lau, Hanchen Ye, Zhuoping Yang, Yubo Du, Jack Lo, Kristof Denolf, Stephen Neuendorffer, Alex Jones, Jingtong Hu, Deming Chen, Jason Cong, Peipei Zhou.
Qubit Mapping for Reconfigurable Atom Array
Conference publication
Bochen Tan, Dolev Bluvstein, Mikhail D. Lukin, and Jason Cong
Democratizing Domain-Specific Computing
Journal publication
Yuze Chi, Weikang Qiao, Atefeh Sohrabizadeh, Jie Wang, Jason Cong
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs
Journal publication
Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, and Jason Cong
TARO: Automatic Optimization for Free-Running Kernels in FPGA HLS
Journal publication
Young-kyu Choi, Yuze Chi, Jason Lau, and Jason Cong
FPGA HLS Today: Successes, Challenges, and Opportunities
Journal publication
Jason Cong, Jason Lau, Gai Liu, Stephen Neuendorffer, Peichen Pan, Kees Vissers, Zhiru Zhang
Energy Efficient LSTM Inference Accelerator for Real-Time Causal Prediction
Journal publication
Zhe Chen, Hugh T. Blair, Jason Cong
FPGA Acceleration of Probabilistic Sentential Decision Diagrams with High-Level Synthesis
Journal publication
Young-kyu Choi, Carlos Santillana, Yujia Shen, Adnan Darwiche, Jason Cong
[PDF]: OverGen: Improving FPGA Usability through Domain-specific Overlay Generation
Conference publication
Sihao Liu , Jian Weng , Dylan Kupsh, Atefeh Sohrabizadeh , Zhengrong Wang , Licheng Guo, Jiuyang Liu, Maxim Zhulin, Rishabh Mani, Lucheng Zhang, Jason Cong, Tony Nowatzki

Our Projects

Domain-specific accelerators (DSAs) have shown to offer significant performance and energy efficiency over general-purpose CPUs to meet the ever increasing performance needs. However, it is well-known that the DSAs in field-programmable gate-arrays (FPGAs) or application specific integrated...

Quantum computing (QC) has been shown, in theory, to hold huge advantages over classical computing. However, there remains many engineering challenges in the implementation of real-world QC applications. In order to divide-and-conquer, we can split the task as below.


Heterogeneous computing with extensive use of accelerators, such as FPGAs and GPUs, has shown great promise to bring in orders of magnitude improvement in computing efficiency for a wide range of applications. The latest advances in industry have led to highly integrated heterogeneous hardware...

Direction 1: Real-Time Neural Signal Processing for Closed-Loop Neurofeedback Applications.

The miniaturized fluorescence microscope (Miniscope) and the tetrodes assembly are emerging techniques in observing the activity of a large population of neuros in vivo. It opens up new research...

In the Big Data era, the volume of data is exploding, putting forward a new challenge to existing computer systems. Traditionally, the computer system is designed to be computing-centric, in which the data from IO devices is transferred and then processed by the CPU. However, this data movement...

In this project, we explore efficient algorithms and architectures for state-of-the-art deep learning based applications. In the first work, we are exploring learning algorithms and acceleration techniques on graph learning algorithms. The second work, Caffeine, offers a uniformed...

In the era of big data, many applications present siginificant compuational challenges. For example, in the field of bio-infomatics, the computation demand for personalized cancer treatment is prohibitively high for the general-purpose computing technologies, as tumor heterogeneity...

To meet ever-increasing computing needs and overcome power density limitations, the computing industry has entered theera of parallelization, with tens to hundreds of computing cores integrated into a single...