VAST lab at UCLA

The VAST lab at UCLA investigates cutting-edge research topics at the intersection of VLSI technologies, design automation,  architecture and compiler optimization at multiple scales, from micro-architecture building blocks,  to heterogeneous compute nodes, and scalable data centers.  Current focuses include architecture and design automation for emerging technologies, customizable domain-specific computing with applications to multiple domains, such as imaging processing, bioinformatics, data mining and machine learning.

The greatest online casino games, payouts and bonuses in Canada can be found at JackpotCity.

Latest News

Wed, May 1, 2024

Congratulations to Atefeh for receiving the 2024 Computer Science Graduate Student Award

In the past few decades, HLS tools were introduced to raise the abstraction level and free designers from delving into architecture details at the circuit level. While HLS can significantly reduce...

Fri, Apr 26, 2024

Prof. Cong is one of the five UCLA faculty members elected to the American Academy of Arts and Sciences, one of the nation’s most prestigious honorary societies. More information is available at https://...

Latest Publications

TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs
Conference publication
Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong
Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition
Journal publication
Liqiang Lu, Zizhang Luo, Size Zheng, Jieming Yin, Jason Cong, Yun Liang, Jianwei Yin
Compiling Quantum Circuits for Dynamically Field-Programmable Neutral Atoms Array Processors
Journal publication
Daniel Bochen Tan, Dolev Bluvstein, Mikhail D. Lukin, and Jason Cong
LevelST: Stream-based Accelerator for Sparse Triangular Solver
Conference publication
Zifan He, Linghao Song, Robert F. Lucas, Jason Cong
Towards a Comprehensive Benchmark for High-Level Synthesis Targeted to FPGAs
Conference publication
Yunsheng Bai, Atefeh Sohrabizadeh, Zongyue Qin, Ziniu Hu, Yizhou Sun, and Jason Cong
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design
Journal publication
Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang and Jason Cong
Robust GNN-based Representation Learning for HLS
Conference publication
Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun, Jason Cong
Point of View: Micro/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities
Journal publication
Gert Cauwenberghs, Jason Cong, X. Sharon Hu, Subhasish Mitra, Wolfgang Porod, H.-S. Philip Wong
[PDF]: A Comprehensive Automated Exploration Framework for Systolic Array Designs
Conference publication
Suhail Basalama, Jie Wang, Jason Cong

Our Projects

Domain-specific accelerators (DSAs) have shown to offer significant performance and energy efficiency over general-purpose CPUs to meet the ever increasing performance needs. However, it is well-known that the DSAs in field-programmable gate-arrays (FPGAs) or application specific integrated...



  • Compilation in quantum computing (QC)
  • Benchmarks - what quantum algorithm we compile?
  • Optimality study - how far are we from optimal?
  • Optimal quantum layout synthesis
  • Exploring architecture design with layout synthesis...

Heterogeneous computing with extensive use of accelerators, such as FPGAs and GPUs, has shown great promise to bring in orders of magnitude improvement in computing efficiency for a wide range of applications. The latest advances in industry have led to highly integrated heterogeneous hardware...

Direction 1: Real-Time Neural Signal Processing for Closed-Loop Neurofeedback Applications.

The miniaturized fluorescence microscope (Miniscope) and the tetrodes assembly are emerging techniques in observing the activity of a large population of neuros in vivo. It opens up new research...

In the Big Data era, the volume of data is exploding, putting forward a new challenge to existing computer systems. Traditionally, the computer system is designed to be computing-centric, in which the data from IO devices is transferred and then processed by the CPU. However, this data movement...

In this project, we explore efficient algorithms and architectures for state-of-the-art deep learning based applications. In the first set of works, we are exploring learning algorithms and acceleration techniques on graph learning algorithms. At their core, they deal with sparse...

In the era of big data, many applications present siginificant compuational challenges. For example, in the field of bio-infomatics, the computation demand for personalized cancer treatment is prohibitively high for the general-purpose computing technologies, as tumor heterogeneity...

To meet ever-increasing computing needs and overcome power density limitations, the computing industry has entered theera of parallelization, with tens to hundreds of computing cores integrated into a single...

Software Releases This project provides SMT solving method and a heuristic, row packing, for the exact binary matrix factorization (EBMF) problem. Additionally, we provide an SMT method to find fooling set size of a binary...

LEKO and LEKU Suites [GitHub]

(Logic synthesis Examples with Known Optimal/Upper-bounds)

Director : ...

Optimal Layout Synthesizer of Quantum Circuits for Dynamically Field-Programmable Qubits Array.