Programming Infrastructure for Heterogeneous Architectures

Project status: 

Heterogeneous computing with extensive use of accelerators, such as FPGAs and GPUs, has shown great promise to bring in orders of magnitude improvement in computing efficiency for a wide range of applications. The latest advances in industry have led to highly integrated heterogeneous hardware platforms, such as the CPU+FPGA multi-chip packages by Intel and the GPU and FPGA enabled AWS cloud by Amazon. However, although these heterogeneous hardware computing platforms are becoming widely available to the industry, they are very difficult to program especially with FPGAs. The use of such platforms has been limited to a small subset of programmers with specialized hardware knowledge. The goal of this project is to develop a highly productive multi-paradigm programming infrastructure for heterogeneous architectures.

The proposed multi-paradigm programming infrastructure for heterogeneous computing includes the following four innovative research components: (1) This project proposes a new programming model, named HeteroCL, that enables programming of heterogeneous systems in a single unified program that blends declarative symbolic expressions with imperative programming for high programming productivity. This new infrastructure provides the ability for the programmer to explore a high-level design space for an efficient mapping of applications to different components in the heterogeneous system; (2) A reusable methodology will be developed to efficiently transform high-level domain-specific languages (DSLs) to HeteroCL with demonstrations using two highly popular DSLs: Halide for image processing and Spark for big-data computing; (3) An efficient runtime system will be created to support the HeteroCL programming model and high-level DSLs, with the unique capability of dynamic and intelligent co-scheduling of workloads to CPUs and accelerators at multiple levels of computing hierarchy; (4) Novel performance debugging tools will be developed with automated code insertion for instrumentation and performance monitoring by leveraging some of the recent advances in software debugging, such as spectra-based localization, and by designing new support to measure performance metrics at the FPGA. This research is unique and exciting as it provides a complete multi-paradigm programming infrastructure that integrates convenient heterogeneous programming models, automated compilation for high-level DSLs, and novel runtime and debugging support.

This project is supported by NSF/Intel.