VAST lab at UCLA

The VAST lab at UCLA investigates cutting-edge research topics at the intersection of VLSI technologies, design automation,  architecture and compiler optimization at multiple scales, from micro-architecture building blocks,  to heterogeneous compute nodes, and scalable data centers.  Current focuses include architecture and design automation for emerging technologies, customizable domain-specific computing with applications to multiple domains, such as imaging processing, bioinformatics, data mining and machine learning.

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Latest News

Tue, Jul 16, 2024

Prof. Cong has been selected to receive the 2025 ISPD Lifetime Achievement Award, to be presented at the International Symposium on Physical Design (ISPD) in Austin, TX, on March 16-19, 2025.  This award is given to individuals who have made outstanding contributions to the field of physical...

Wed, May 1, 2024

Congratulations to Atefeh for receiving the 2024 Computer Science Graduate Student Award

In the past few decades, HLS tools were introduced to raise the abstraction level and free designers from delving into architecture details at the circuit level. While HLS can significantly reduce...

Latest Publications

Harnessing GNNs for Robust Representation Learning in High-Level Synthesis
Journal publication
Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun, Jason Cong
PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs
Journal publication
Moazin Khatti, Xingyu Tian, Ahmad Sedigh Baroughi, Akhil Raj Baranwal, Yuze Chi, Licheng Guo, Jason Cong, Zhenman Fang
Quantum State Preparation Circuit Optimization Exploiting Dont Cares
Conference publication
Hanyu Wang, Daniel Bochen Tan, Jason Cong
Learning to Compare Hardware Designs for High-Level Synthesis
Conference publication
Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding, Rongjian Liang, Weikai Li, Ding Wang, Haoxing Ren, Yizhou Sun, Jason Cong
Cross-Modality Program Representation Learning for Electronic Design Automation with High-Level Synthesis
Conference publication
Zongyue Qin[1], Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding, Ziniu Hu, Yizhou Sun, Jason Cong
Atomique: A Quantum Compiler for Reconfigurable Neutral Atom Arrays
Conference publication
Hanrui Wang, Pengyu Liu, Daniel Bochen Tan, Yilian Liu, Jiaqi Gu, David Z. Pan, Jason Cong, Umut A. Acar, Song Han
Q-Pilot: Field Programmable Qubit Array Compilation with Flying Ancillas
Conference publication
Hanrui Wang, Daniel Bochen Tan, Pengyu Liu, Yilian Liu, Jiaqi Gu, Jason Cong, Song Han
TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs
Conference publication
Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong
Depth-Optimal Addressing of 2D Qubit Array with 1D Controls Based on Exact Binary Matrix Factorization
Conference publication
Daniel Bochen Tan, Shuohao Ping, Jason Cong
Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition
Journal publication
Liqiang Lu, Zizhang Luo, Size Zheng, Jieming Yin, Jason Cong, Yun Liang, Jianwei Yin

Our Projects

Domain-specific accelerators (DSAs) have shown to offer significant performance and energy efficiency over general-purpose CPUs to meet the ever increasing performance needs. However, it is well-known that the DSAs in field-programmable gate-arrays (FPGAs) or application specific integrated...

 

Description:

  • Compilation in quantum computing (QC)
  • Benchmarks - what quantum algorithm we compile?
  • Optimality study - how far are we from optimal?
  • Optimal quantum layout synthesis
  • Exploring architecture design with layout synthesis...

Heterogeneous computing with extensive use of accelerators, such as FPGAs and GPUs, has shown great promise to bring in orders of magnitude improvement in computing efficiency for a wide range of applications. The latest advances in industry have led to highly integrated heterogeneous hardware...

Direction 1: Real-Time Neural Signal Processing for Closed-Loop Neurofeedback Applications.

The miniaturized fluorescence microscope (Miniscope) and the tetrodes assembly are emerging techniques in observing the activity of a large population of neuros in vivo. It opens up new research...

In the Big Data era, the volume of data is exploding, putting forward a new challenge to existing computer systems. Traditionally, the computer system is designed to be computing-centric, in which the data from IO devices is transferred and then processed by the CPU. However, this data movement...

In this project, we explore efficient algorithms and architectures for state-of-the-art deep learning based applications. In the first set of works, we are exploring learning algorithms and acceleration techniques on graph learning algorithms. At their core, they deal with sparse...

In the era of big data, many applications present siginificant compuational challenges. For example, in the field of bio-infomatics, the computation demand for personalized cancer treatment is prohibitively high for the general-purpose computing technologies, as tumor heterogeneity...

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To meet ever-increasing computing needs and overcome power density limitations, the computing industry has entered theera of parallelization, with tens to hundreds of computing cores integrated into a single...

Software Releases

https://github.com/UCLA-VAST/EBMF This project provides SMT solving method and a heuristic, row packing, for the exact binary matrix factorization (EBMF) problem. Additionally, we provide an SMT method to find fooling set size of a binary...

LEKO and LEKU Suites [GitHub]

(Logic synthesis Examples with Known Optimal/Upper-bounds)

Director : ...

Optimal Layout Synthesizer of Quantum Circuits for Dynamically Field-Programmable Qubits Array. https://github.com/UCLA-VAST/DPQA