Performance-Driven Interconnect Design Based on Distributed RC Delay Model Read more about Performance-Driven Interconnect Design Based on Distributed RC Delay Model
A Parallel Bottom-up Clustering Algorithm with Applications to Circuit Partitioning in VLSI Designs Read more about A Parallel Bottom-up Clustering Algorithm with Applications to Circuit Partitioning in VLSI Designs
Finding Uni-Directional Cuts Based on Physical Partitioning and Logic Restructuring Read more about Finding Uni-Directional Cuts Based on Physical Partitioning and Logic Restructuring
On High-Speed VLSI Interconnects: Analysis and Design Read more about On High-Speed VLSI Interconnects: Analysis and Design
An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs Read more about An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs
An Improved Graph-Based FPGA Technology Mapping Algorithm For Delay Optimization Read more about An Improved Graph-Based FPGA Technology Mapping Algorithm For Delay Optimization
Maximal Reduction of Lookup-Table Based FPGAs Read more about Maximal Reduction of Lookup-Table Based FPGAs