Energy-Efficient Scheduling on Heterogeneous Multi-core Architectures Read more about Energy-Efficient Scheduling on Heterogeneous Multi-core Architectures
CHARM: A Composable Heterogeneous Accelerator-Rich Microprocessor Read more about CHARM: A Composable Heterogeneous Accelerator-Rich Microprocessor
Architecture Support for Accelerator-Rich CMPs Read more about Architecture Support for Accelerator-Rich CMPs
Optimizing Memory Hierarchy Allocation with Loop Transformations for High-Level Synthesis Read more about Optimizing Memory Hierarchy Allocation with Loop Transformations for High-Level Synthesis
A Metric for Layout-Friendly Microarchitecture Optimization in High-Level Synthesis Read more about A Metric for Layout-Friendly Microarchitecture Optimization in High-Level Synthesis
Mapping a data-flow programming model onto heterogeneous platforms Read more about Mapping a data-flow programming model onto heterogeneous platforms
Dynamically Reconfigurable Hybrid Cache: An Energy-Efficient Last-Level Cache Design Read more about Dynamically Reconfigurable Hybrid Cache: An Energy-Efficient Last-Level Cache Design
Combining Module Selection and Replication for Throughput-Driven Streaming Programs Read more about Combining Module Selection and Replication for Throughput-Driven Streaming Programs
Transformation from Ad Hoc EDA to Algorithmic EDA Read more about Transformation from Ad Hoc EDA to Algorithmic EDA
Towards Layout-Friendly High-Level Synthesis Read more about Towards Layout-Friendly High-Level Synthesis