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- Jason Cong and Bingjun Xiao, US Patent 9,461,649, Issued on October 4, 2016, “Programmable Logic Circuit Architecture Using Resistive Memory Elements”.
- B. Liu, Z. Zhang and J. Cong, US Patent 8,296,710, Issued on Oct 23, 2012, “Soft Constraints in Scheduling”.
- Mau-Chung F. Chang, Jason Cong, Adam Kaplan, Mishali Naik, Glenn Reinman, Eran Socher, Sai-Wang Tam and Chunyue Liu, U.S. Patent No. 8,270,316, Issued on September 18, 2012, “On-Chip Radio Frequency (RF) Interconnects for Network-on-Chip Designs”.
- Jason Cong and David Z. Pan, U.S. Patent No. 6,408,427, Issued on June 18, 2002, “Wire Width Planning and Performance Optimization for VLSI Interconnects”.
- Jason Cong and David Z. Pan, U.S. Patent No. 7,013,253, Issued on March 14, 2006, “Method and Apparatus for Calculation of Crosstalk Noise in Integrated Circuits”.