New NSF Award on Automating High Level Synthesis via Graph-Centric Deep Learning

The team led by Professors Jason Cong and Yizhou Sun from the CS Department were recently awarded $1.2M  from the National Science Foundation (NSF) for the project entitled “High Level Synthesis via Graph-Centric Deep Learning”.

Domain-specific accelerators (DSAs) have shown to offer significant performance and energy efficiency over general-purpose CPUs to meet the ever increasing performance needs. However, it is well-known that the DSAs in field-programmable gate-arrays (FPGAs) or application specific integrated circuits (ASICs) are hard to design and require deep hardware knowledge to achieve high performance. Although the recent advances in high-level synthesis (HLS) tools made it possible to compile behavioral-level C/C++ programs to FPGA or ASIC designs, one still needs to have extensive experience in microarchitecture optimizations using pragmas and code transformation to the input program, which presents a significant barrier to a typical application domain-expert or software developer to design a DSA. Even worse, evaluating each HLS design candidate is time consuming, which makes it very difficult to perform manual design iteration or automated exploration. The proposed project addresses these problems by developing a fully automated framework for evaluating and optimizing the microarchitecture of a DSA design without the invocation of the time-consuming HLS tools. It represents the input C/C++ program as one or a set of graphs with the proper data flow and control flow information, including auto-inserted optimization directives (pragmas), and then makes use of the latest advances in graph-based machine learning (ML) and ML-driven optimizations to quickly evaluate each solution candidate and guide the optimization process. The goal of this project is to enable a typical software programmer to be able to design highly efficient hardware DSAs, with the quality comparable to those designed by experienced circuit designers.