VAST lab at UCLA

The VAST lab at UCLA investigates cutting-edge research topics at the intersection of VLSI technologies, design automation,  architecture and compiler optimization at multiple scales, from micro-architecture building blocks,  to heterogeneous compute nodes, and scalable data centers.  Current focuses include architecture and design automation for emerging technologies, customizable domain-specific computing with applications to multiple domains, such as imaging processing, bioinformatics, data mining and machine learning.

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Latest News

Fri, Jan 5, 2024

We are pleased to share the interview of Prof. Jason Cong by the IEEE Circuits and Systems Magazine, Prof. Yiran Chen, EiC, and Prof. Fan Chen, the Associate Editor.

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Mon, Dec 11, 2023

This program is intended to support doctoral students who are advanced to candidacy at the time of nomination by their department to the Division of Graduate Education.  Approximately 160 fellowships are awarded under this program yearly across the UCLA campus.  Atefeh's dissertation is on...

Mon, Nov 27, 2023

UCLA VAST Lab would like to congratulate its former member Prof. Lei He (advised by Prof. Jason Cong) who is elected to IEEE Fellow for contribution to integrated circuits and smart energy systems.  Lei got PhD in 1999 and has been a professor with UCLA Electric Engineering since 2002.  His...

Latest Publications

Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition
Journal publication
Liqiang Lu, Zizhang Luo, Size Zheng, Jieming Yin, Jason Cong, Yun Liang, Jianwei Yin
Compiling Quantum Circuits for Dynamically Field-Programmable Neutral Atoms Array Processors
Journal publication
Daniel Bochen Tan, Dolev Bluvstein, Mikhail D. Lukin, and Jason Cong
LevelST: Stream-based Accelerator for Sparse Triangular Solver
Conference publication
Zifan He, Linghao Song, Robert F. Lucas, Jason Cong
Towards a Comprehensive Benchmark for High-Level Synthesis Targeted to FPGAs
Conference publication
Yunsheng Bai, Atefeh Sohrabizadeh, Zongyue Qin, Ziniu Hu, Yizhou Sun, and Jason Cong
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design
Journal publication
Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang and Jason Cong
Robust GNN-based Representation Learning for HLS
Conference publication
Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun, Jason Cong
Point of View: Micro/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities
Journal publication
Gert Cauwenberghs, Jason Cong, X. Sharon Hu, Subhasish Mitra, Wolfgang Porod, H.-S. Philip Wong
[PDF]: A Comprehensive Automated Exploration Framework for Systolic Array Designs
Conference publication
Suhail Basalama, Jie Wang, Jason Cong
Scalable Optimal Layout Synthesis for NISQ Quantum Processors
Conference publication
Wan-Hsuan Lin, Jason Kimko, Bochen Tan, Nikolaj Bjørner, Jason Cong

Our Projects

Domain-specific accelerators (DSAs) have shown to offer significant performance and energy efficiency over general-purpose CPUs to meet the ever increasing performance needs. However, it is well-known that the DSAs in field-programmable gate-arrays (FPGAs) or application specific integrated...

 

Description:

  • Compilation in quantum computing (QC)
  • Optimality study - how far are we from optimal?
  • Optimal quantum layout synthesis
  • Exploring architecture design with layout synthesis
  • Layout synthesis for reconfigruable QC...

Heterogeneous computing with extensive use of accelerators, such as FPGAs and GPUs, has shown great promise to bring in orders of magnitude improvement in computing efficiency for a wide range of applications. The latest advances in industry have led to highly integrated heterogeneous hardware...

Direction 1: Real-Time Neural Signal Processing for Closed-Loop Neurofeedback Applications.

The miniaturized fluorescence microscope (Miniscope) and the tetrodes assembly are emerging techniques in observing the activity of a large population of neuros in vivo. It opens up new research...

In the Big Data era, the volume of data is exploding, putting forward a new challenge to existing computer systems. Traditionally, the computer system is designed to be computing-centric, in which the data from IO devices is transferred and then processed by the CPU. However, this data movement...

In this project, we explore efficient algorithms and architectures for state-of-the-art deep learning based applications. In the first set of works, we are exploring learning algorithms and acceleration techniques on graph learning algorithms. At their core, they deal with sparse...

In the era of big data, many applications present siginificant compuational challenges. For example, in the field of bio-infomatics, the computation demand for personalized cancer treatment is prohibitively high for the general-purpose computing technologies, as tumor heterogeneity...

http://www.cdsc.ucla.edu

To meet ever-increasing computing needs and overcome power density limitations, the computing industry has entered theera of parallelization, with tens to hundreds of computing cores integrated into a single...

Software Releases

https://github.com/UCLA-VAST/EBMF This project provides SMT solving method and a heuristic, row packing, for the exact binary matrix factorization (EBMF) problem. Additionally, we provide an SMT method to find fooling set size of a binary...

LEKO and LEKU Suites [GitHub]

(Logic synthesis Examples with Known Optimal/Upper-bounds)

Director : ...

Optimal Layout Synthesizer of Quantum Circuits for Dynamically Field-Programmable Qubits Array. https://github.com/UCLA-VAST/DPQA