Near Data Computing

Project status: 
current

In the Big Data era, the volume of data is exploding, putting forward a new challenge to the existing computer system. Traditionally, the computer system is designed to be computing-centric, in which the data from IO devices are transferred and then processed by the CPU. However, the data movement is proved to be very expensive which can no longer be ignored in the Big Data era. To meet the ever-increasing performance need, we expect the computer system to be redesigned in the data-centric fashion. Different computing engines are deployed in different storage hierarchies, including cache, memory, and disk, to form a multi-level data processing system. By doing computation in the most appropriate data hierarchy, the overall system performance and power efficiency are expected to be greatly improved.

In our group, we are currently focusing on in-storage computing (ISC) systems. The drive I/O speed plays an important role in the overall data processing efficiency—even for the in-memory computing framework. Although for decades the improvement of storage technology has been continuously pushing forward the drive speed, the system bottleneck is shifting from the storage drive to the host/drive interconnection and host I/O stacks. The advent of such a "data movement wall" prevents the high performance of the emerging storage from being delivered to end-users—which puts forward a new challenge to system designers. Rather than moving data from drive to host, ISC systems move computation from host to drive to avoid the aforementioned bottlenecks. However, existing ISC solutions face several system challenges which make them less usable: limited performance, low programmability, and lack of system support.

Therefore, we are actively making progress towards our goal of making the developers’ life easier to achieve efficient and portable acceleration for heterogeneous, in-storage computing (ISC) systems. Our key contributions include INSIDER, a high-performance full-stack ISC system, which exposes a POSIX-like virtual file abstraction to interface application programs with the ISC accelerators, and allows streaming-based kernel development, making the programmers’ life easier; EISC, an FPGA-based ISC emulation system, which obtained an analytical model for accurate quantitative performance analysis of ISC accelerations by evaluating a diverse set of 12 applications. These works enable rapid prototyping of ISC accelerators and are already widely adopted by research groups and industry partners. We enrich the understanding of the benefits and limitations of ISC acceleration and provide useful guidance for selecting the applications for ISC-based acceleration.

We are still working on improving these ISC systems. Our on-going research seeks to extend the applications and devices supported by the INSIDER framework and pushes towards more comprehensive system support, programming model support, and integration support. We also explore the opportunities to help a wider research community using ISC technology by accelerating critical applications.

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