RASP: FPGA/CPLD Technology Mapping and Synthesis Package

RASP, an FPGA/CPLD technology mapping and synthesis package, is the synthesis core of the UCLA RASP System developed at UCLA VLSI CAD LAB. This site is actively updated.

Rasp team:

• Jason Cong

• Deming Chen

• Eugene Ding

• Zhijun Huang

• Yean-Yow Hwang

• John Peck

• Chang Wu

• Songjie Xu

Copyright (C) 1991-2004 the Regents of University of California

Download the RASP Technology Mapping Limited Source Package (Solaris only) Version B1.1
Download the RASP Technology Mapping Executable Package (Solaris and Linux versions available) Version B2.1
Acknowledgement and Contact Info
Package Content
Technical References
Usage
Feedbacks and Bug Reports