Licheng Guo

My name is Licheng Guo (郭栗橙). I am currently a 4th-year PhD student in the CS department. I received my B.S. degree in Electronic Engineering from Zhejiang University in 2018. 

My research focus on co-optimizing HLS compilers (from C++ to RTL) and physical design tools (from RTL to hardware) to improve the circuit maximal freuquency and reduce the compilation time.

I love travelling and aspire to explore every country of this amazing world. I also love music and currently I am actively practicing flute.

 

Contact:  lcguo -at- ucla [dot] edu

 

 

Representative Papers

 

[FPGA'22]  RapidStream: Parallel Physical Implementation of FPGA HLS Designs

Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, Jason Cong

(* Best Paper Award *)

 

[FPGA'21] AutoBridge: Coupling Coarse-Grained Floorplanning with Pipelining for High-Frequency HLS Design on Multi-Die FPGAs

Licheng Guo, Yuze Chi, Jie Wang, Jason Lau, Weikang Qiao, Ecenur Ustun, Zhiru Zhang and Jason Cong

(* Best Paper Award *)

 

[DAC'20] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency

Licheng Guo*, Jason Lau*, Yuze Chi, Jie Wang, Cody Hao Yu, Zhe Chen, Zhiru Zhang and Jason Cong

 

Other Papers:

 

[FPGA'22]  Accelerating SSSP for Power-Law Graphs

Yuze Chi, Licheng Guo, Jason Cong

 

[DAC'22]  Serpens: A High Bandwidth Memory Based Accelerator for General-Purpose Sparse Matrix-Vector Multiplication

Linghao Song, Yuze Chi, Licheng Guo, Jason Cong

 

[FPGA'21] AutoSA: A Polyhedral Compiler for High-Performance Systolic Arrays on FPGA

Jie Wang, Licheng Guo and Jason Cong

 

[FCCM'21] Extending High-Level Synthesis for Task-Parallel Programs

Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang, Jason Cong

 

[FCCM'21] FANS: FPGA Accelerated Near-Storage Sorting Solution

Weikang Qiao, Jihun Oh, Licheng Guo, Mau-Chung Frank Chang and Jason Cong

 

[FCCM'19] Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: A Race Between FPGA and GPU

Licheng Guo*, Jason Lau*, Zhenyuan Ruan, Peng Wei and Jason Cong

 

[FPL'18] SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for Genome Sequencing

Jason Cong, Licheng Guo*, Po-Tsang Huang, Peng Wei, Tianhe Yu*  (Alphabetical ordering)

 

[ArXiv] When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization

Young-kyu Choi, Yuze Chi, Jie Wang, Licheng Guo, Jason Cong

 

(* indicates co-first authors)

 

Github:

https://github.com/Licheng-Guo

 

Google Scholar:

https://scholar.google.com/citations?user=g3tmKnsAAAAJ&hl=en

 

Honors:

2022 Best Paper Award, International Symposium on Field Programmable Gate Arrays (FPGA '22)

2021 Best Paper Award, International Symposium on Field Programmable Gate Arrays (FPGA '21)

2017 Chu Kochen Scholarship, the highest honor for students at Zhejiang University (12 / All)

 

Services:

Journal Review: TCAD, TRETS, TACO, MICRO, TECS, Bioinformatics

Conference (External) Review: FPGA, DAC, FCCM, FPL

Technical Committee: LATTE '22

 

Degree: